Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.11790/1654
DC FieldValueLanguage
dc.contributor.authorCzerny, Bernhardde_at
dc.contributor.authorKhatibi, Goltade_at
dc.contributor.authorLederer, Martinde_at
dc.contributor.authorMagnien, Juliende_at
dc.contributor.authorSuhir, Ephraimde_at
dc.contributor.authorNicolics, Johannde_at
dc.date.accessioned2021-10-30T08:09:46Z-
dc.date.available2021-10-30T08:09:46Z-
dc.date.issued2014-12-03-
dc.identifier.citationProceedings of the 16th Electronics Packaging Technology Conference, EPTC 2014, 186-191de_at
dc.identifier.isbn978-147996994-4-
dc.identifier.urihttp://hdl.handle.net/20.500.11790/1654-
dc.identifier.urihttp://d-nb.info/1033127752-
dc.description.abstractElectronic product manufacturers are constantly seeking efficient, cost-effective and trustworthy accelerated test (AT) methods to keep up with the today's market demands. At present, accelerated temperature cycling testing is viewed as the state of the art for reliability assessment of electronic products. Accelerated mechanical fatigue testing has been proposed recently as a novel concept and an attractive cost-effective and time-saving qualification alternative for electronic devices. The principle idea of this approach is replacement of thermally induced loading with equivalent and adequate mechanical loading. Using mechanical fatigue testing set-ups, the devices under test can be subjected to single or multi-axial cyclic loading conditions at high frequencies. As a result, physically meaningful lifetime curves can be obtained. The suggested methodologies and procedures enable one to detect the vulnerable sites of the devices in a very short time. Exemplary results for power semiconductor products demonstrate the applicability of the proposed method for qualification of first and second level interconnects. The advantages and limitations of the proposed concept are addressed and discussed in detail.de_at
dc.description.sponsorshipEnergie-Umweltmanagementde_at
dc.language.isoende_at
dc.publisherElsevierde_at
dc.relation.ispartofseriesProceedings of the 16th Electronics Packaging Technology Conference;7028353-
dc.titleTowards adequate qualification testing of electronic products: Review and extensionde_at
dc.title.alternative2014 16th IEEE Electronics Packaging Technology Conference, EPTC 2014, Marina Bay SandsSingapore, Singapore, 3 December 2014 through 5 December 2014de_at
dc.typeKonferenzbeitragde_at
item.openairetypeKonferenzbeitrag-
item.languageiso639-1en-
item.cerifentitytypePublications-
item.fulltextNo Fulltext-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.grantfulltextnone-
crisitem.author.orcid0000-0001-8147-3122-
Appears in Collections:Energie-Umweltmanagement
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